TEKTRONIX PCI-EXPRESS 6.0 테스트 솔루션
가격문의(상세정보 참조)
TEKTRONIX PCI-EXPRESS 6.0 테스트 솔루션
TEKTRONIX PCI-EXPRESS 6.0 Transmitter Compliance/Debug Solution
- 업계 최초의 PCIe 6.0 지원
- 트랜스미터 검증 솔루션
- 50Gz 대역 이상의 실시간 오실로스코프를 사용하여 PCIe 6.0(64GT/s) 규격 지원
- PAMJETE 애플리케이션에 의한 강화된 PAM4 DSP 기능
- SNDR, RLM, 비상관 지터, 펄스 폭 지터 등 독자적으로 개발한 측정 기능
- 각각의 측정에 맞춘 계측 노이즈 보정 기술
클릭 하시면 이동합니다.
텍트로닉스 ・ TEKTRONIX
PCI-EXPRESS 6.0
테스트 솔루션
PCI-EXPRESS 6.0 Transmitter Compliance/Debug Solution
The PCI-SIG 6.0 specification has introduced PAM4 signaling to achieve 64 GT/s while maintaining NRZ signaling for backwards compatibility. The multilevel (PAM4) approach brings new signal integrity challenges to adopters and validation teams. Tektronix PCI Express 6.0 software minimizes this new complexity to automate testing and ensures measurement accuracy and repeatability.
The Tektronix Option PCE6 (Gen6), Option PCE5 (Gen5), Option PCE4 (Gen4), and PCE3 (Gen 1/2/3) applications provide the most comprehensive solution for PCI Express Transmitter and Reference Clock compliance testing as well as debug and validation of PCI Express devices against the PCI-SIG® specifications.
- Features and benefits
- Support for PCI Express Gen6 Base (silicon) transmitter testing
- PCI Express Gen 1/2/3/4/5 validation and compliance of Transmitters at the BASE (silicon) and CEM (system) levels for the Tektronix DPO/MSO70000 Series oscilloscopes
- Reference Clock jitter and signal integrity measurements for Gen1 to Gen5 using SkyWorks Clock Jitter Tool and DPOJET
- 64 GT/s (PAM4) signal integrity measurements using DPOJET/PAMJET
- PCIe Gen6 Tx Equalization Preset test using AC Fit Method
- Automation fully configures the oscilloscope including the vertical and horizonal scales for accurate and specification compliant measurements
- Automated acquisition and waveform management to simplify testing across supported data rates, Tx compliance patterns, and lane widths
- Automated DUT control to step through data rates and compliance patterns
- RF switch automation of PCIe3 test solution, supporting up to x16 lanes
- Support for NVMe and CXL physical layer testing
- De-embedd the impact of a break-out channel, test fixtures, and cables to achieve measurements at the test point of interest (requires Option SDLA Serial Data Link Analysis)
- Test selection: Select the specification against which to perform the analysis, and select individual tests or groups of tests to perform targeted compliance analysis for failing tests
- SigTest integration: Uses SigTest EXE (using command line interface) to perform the analysis of acquired waveforms, providing the ability to test a system using the PCI-SIG®-recommended analysis tool
- Analysis of multiple waveforms are done in parallel using multiple sigtest instances
- AC Fit Tx EQ Preset characterization for Gen5 with SigTest Phoenix
- Reporting: Compiles all test results into a customizable report with Pass/Fail results for easy analysis and record keeping
- Summary table at the top of the report for quick glance of results for normative measurement
- Pattern matching: Verifies that the correct set of compliance patterns are sent by the transmitter before acquiring signals for compliance analysis. This feature is supported up to Gen3 data rates
- PHY level protocol decode: Decodes and displays the PCIe data in a protocol-aware view. A time-correlated event table view with waveforms allows for quickly searching through events of interest
- Multi-lane testing: Perform analysis on multiple lanes of PCI express data to speed up the Tx analysis in a multi-lane system
- Compliance and debug: Provides a toolkit of DPOJET-based setups to quickly switch into debug and validation mode when a DUT fails compliance
- Analysis and debug tools: Tektronix provides a broad range of compliance, debug, and validation tools for Transmitter (Tx), Receiver (Rx), and protocol testing
- Comprehensive programmatic interface: Enables automation of programs and scripts to call PCIe related TekExpress functions
PCI-EXPRESS PCI-EXPRESS 텍트로닉스 텍트로닉스 PCI-EXPRESS PCI-EXPRESS TEKTRONIX TEKTRONIX PCI-EXPRESS PCI EXPRESS PCI EXPRESS 텍트로닉스 텍트로닉스 PCI EXPRESS PCI EXPRESS TEKTRONIX TEKTRONIX PCI EXPRESS
가격이 궁금하신가요?
더 많은 자료는?
클릭 하시면 이동합니다.
텍트로닉스 ・ TEKTRONIX
PCI-EXPRESS 6.0
테스트 솔루션
PCI-EXPRESS 6.0 Transmitter Compliance/Debug Solution
The PCI-SIG 6.0 specification has introduced PAM4 signaling to achieve 64 GT/s while maintaining NRZ signaling for backwards compatibility. The multilevel (PAM4) approach brings new signal integrity challenges to adopters and validation teams. Tektronix PCI Express 6.0 software minimizes this new complexity to automate testing and ensures measurement accuracy and repeatability.
The Tektronix Option PCE6 (Gen6), Option PCE5 (Gen5), Option PCE4 (Gen4), and PCE3 (Gen 1/2/3) applications provide the most comprehensive solution for PCI Express Transmitter and Reference Clock compliance testing as well as debug and validation of PCI Express devices against the PCI-SIG® specifications.
- Features and benefits
- Support for PCI Express Gen6 Base (silicon) transmitter testing
- PCI Express Gen 1/2/3/4/5 validation and compliance of Transmitters at the BASE (silicon) and CEM (system) levels for the Tektronix DPO/MSO70000 Series oscilloscopes
- Reference Clock jitter and signal integrity measurements for Gen1 to Gen5 using SkyWorks Clock Jitter Tool and DPOJET
- 64 GT/s (PAM4) signal integrity measurements using DPOJET/PAMJET
- PCIe Gen6 Tx Equalization Preset test using AC Fit Method
- Automation fully configures the oscilloscope including the vertical and horizonal scales for accurate and specification compliant measurements
- Automated acquisition and waveform management to simplify testing across supported data rates, Tx compliance patterns, and lane widths
- Automated DUT control to step through data rates and compliance patterns
- RF switch automation of PCIe3 test solution, supporting up to x16 lanes
- Support for NVMe and CXL physical layer testing
- De-embedd the impact of a break-out channel, test fixtures, and cables to achieve measurements at the test point of interest (requires Option SDLA Serial Data Link Analysis)
- Test selection: Select the specification against which to perform the analysis, and select individual tests or groups of tests to perform targeted compliance analysis for failing tests
- SigTest integration: Uses SigTest EXE (using command line interface) to perform the analysis of acquired waveforms, providing the ability to test a system using the PCI-SIG®-recommended analysis tool
- Analysis of multiple waveforms are done in parallel using multiple sigtest instances
- AC Fit Tx EQ Preset characterization for Gen5 with SigTest Phoenix
- Reporting: Compiles all test results into a customizable report with Pass/Fail results for easy analysis and record keeping
- Summary table at the top of the report for quick glance of results for normative measurement
- Pattern matching: Verifies that the correct set of compliance patterns are sent by the transmitter before acquiring signals for compliance analysis. This feature is supported up to Gen3 data rates
- PHY level protocol decode: Decodes and displays the PCIe data in a protocol-aware view. A time-correlated event table view with waveforms allows for quickly searching through events of interest
- Multi-lane testing: Perform analysis on multiple lanes of PCI express data to speed up the Tx analysis in a multi-lane system
- Compliance and debug: Provides a toolkit of DPOJET-based setups to quickly switch into debug and validation mode when a DUT fails compliance
- Analysis and debug tools: Tektronix provides a broad range of compliance, debug, and validation tools for Transmitter (Tx), Receiver (Rx), and protocol testing
- Comprehensive programmatic interface: Enables automation of programs and scripts to call PCIe related TekExpress functions
PCI-EXPRESS PCI-EXPRESS 텍트로닉스 텍트로닉스 PCI-EXPRESS PCI-EXPRESS TEKTRONIX TEKTRONIX PCI-EXPRESS PCI EXPRESS PCI EXPRESS 텍트로닉스 텍트로닉스 PCI EXPRESS PCI EXPRESS TEKTRONIX TEKTRONIX PCI EXPRESS
